A PCB can pass electrical-rule checks, look correct in 3D, and still be difficult to manufacture.
That is the gap Design for Manufacturing, or DFM, is meant to close.
A useful DFM review does not ask only, “Is the schematic correct?” It asks a different set of questions: Can the board be fabricated repeatedly? Can solder paste be printed reliably? Can the placement machine identify and place every component? Can the board survive reflow? Can the assembly be inspected and tested without unnecessary manual work?
Chinese hardware communities are full of examples where a board was electrically correct but production still became expensive or slow because of details such as via geometry, missing assembly data, poor component spacing, incorrect origin settings, weak panelization, or footprints that had never been checked against the actual part.
The lesson is simple: the best time to fix a manufacturing problem is before the Gerbers are released.
Below is a practical checklist we use when thinking about PCB designs that are moving toward SMT assembly.
For the broader review scope, start with what a PCB DFM review covers, then follow the SMT assembly process to see how release data affects the production line.
1. Do not treat the PCB manufacturer’s minimum capability as your normal design rule
Every board house publishes minimum line width, spacing, drill size, annular ring and solder-mask capabilities. Those values are useful, but they are often capability limits rather than ideal design targets.
If every feature on the board is designed at the process limit, the design can become more sensitive to registration tolerance, drilling tolerance, solder-mask alignment and yield variation. It may also move the job into a more expensive process category.
A better approach is to ask:
- What is the manufacturer’s standard process capability?
- Which features require an advanced or special process?
- Does reducing a via or trace actually create product value?
- Will a slightly more generous geometry improve yield without hurting the mechanical design?
The goal of DFM is not to prove that the factory can make a feature once. The goal is to make the board easy to manufacture repeatedly.
2. Check drill size and annular ring together
A via is not defined by drill diameter alone. The copper ring around the finished hole also matters.
A common mistake is shrinking the pad diameter to save routing space while leaving the drill unchanged. That reduces the annular ring and gives the fabrication process less margin for drilling and registration tolerance.
During review, check:
- finished-hole requirement;
- drill size;
- via pad diameter;
- annular-ring width;
- via-to-copper clearance;
- via-to-via spacing;
- whether the via is tented, plugged, filled or left open.
This matters even more near BGAs, fine-pitch devices and dense power layouts.
Do not copy one universal via rule from the internet. Via capability depends on layer count, board thickness, aspect ratio, material, hole type and the selected PCB process.
3. Review via-in-pad intentionally, not accidentally
Via-in-pad can be extremely useful for dense BGAs, thermal pads and short current paths. But an open via placed directly in a solderable pad can also pull solder away during reflow.
That can lead to:
- insufficient solder volume;
- uneven component seating;
- voiding;
- weak joints;
- difficult inspection.
If via-in-pad is necessary, decide deliberately whether the fabrication process requires filled and capped vias or another controlled treatment.
The important DFM question is not “Is via-in-pad allowed?” It is “Does the selected fabrication and assembly process support the exact via-in-pad structure used here?”
4. Verify every footprint against the real component
Footprint errors are among the most expensive mistakes because they often survive schematic review.
Typical problems include:
- wrong pad pitch;
- wrong package variant;
- incorrect exposed-pad dimensions;
- missing thermal vias;
- reversed pin numbering;
- incorrect courtyard;
- incorrect polarity marking;
- a connector body that collides with the enclosure.
Do not rely only on a library name such as QFN-32 or SOT-23-5. Compare the footprint with the current component datasheet and, where appropriate, the manufacturer’s recommended land pattern.
For custom or high-risk parts, also check the 3D model and mechanical dimensions.
A footprint is a manufacturing instruction, not just a drawing symbol.
5. Check solder-mask openings and solder-mask dams
Solder mask controls where solder should not go. Poor mask design can create bridges, exposed copper or reduced process margin.
Review:
- mask opening around fine-pitch pads;
- mask slivers between neighboring pads;
- mask registration tolerance;
- openings around test points;
- mask behavior around thermal pads and vias;
- whether copper features are unintentionally exposed.
On dense packages, the PCB manufacturer’s solder-mask capability may determine whether a solder-mask-defined or non-solder-mask-defined structure is practical.
Again, use the selected manufacturer’s current capability rather than a generic number copied from another factory.
6. Treat paste-mask design as an assembly parameter
The copper pad and the stencil opening do not always need to be identical.
Large thermal pads, QFNs, LGAs and some fine-pitch components may require paste-window segmentation or a controlled reduction in paste area. Too much paste can cause floating, bridging or excessive voiding. Too little can produce weak joints.
Questions for DFM/DFA review include:
- Is the paste aperture appropriate for the package?
- Does the thermal pad need a window pattern?
- Are very small passive components at risk of tombstoning because of uneven paste or thermal imbalance?
- Does the selected stencil process match the smallest and largest apertures on the board?
Stencil design is part of assembly engineering. It should not be an afterthought generated blindly from copper geometry.
7. Give the placement machine enough information
SMT assembly depends on more than Gerber files.
The manufacturer usually needs a BOM and a placement file containing designators, coordinates, side and rotation. Problems appear when those files disagree.
Common failure modes include:
- BOM contains a designator missing from the placement file;
- placement file contains DNP components that should not be assembled;
- rotation is wrong because the library origin was defined inconsistently;
- top and bottom layers are confused;
- the coordinate origin changes between revisions;
- a footprint name or designator no longer matches the released schematic.
Before release, cross-check the BOM and pick-and-place/CPL file as a pair.
A simple rule helps: every assembled designator should have one unambiguous part identity and one unambiguous placement definition.
8. Leave realistic spacing between components
It is easy to place components tightly in CAD because the software only sees geometry. The factory must handle real components, nozzles, soldering, rework and inspection.
Crowded layouts can create problems such as:
- placement-head interference;
- difficult hand soldering;
- poor AOI visibility;
- impossible probe access;
- rework risk to neighboring parts;
- heat concentration.
Pay special attention around:
- tall electrolytic capacitors;
- connectors;
- shield cans;
- transformers;
- large inductors;
- antennas;
- buttons and switches;
- components requiring manual soldering.
Component spacing is not only a PCB-layout decision. It affects assembly cost and serviceability.
9. Check polarity and orientation at three levels
A surprising number of assembly errors come from orientation ambiguity.
Verify polarity/orientation in:
- the footprint/pad numbering;
- the silkscreen or assembly drawing;
- the placement file.
High-risk parts include:
- LEDs;
- diodes;
- electrolytic capacitors;
- IC pin 1;
- connectors;
- batteries;
- polarized protection devices.
The markings should be clear even when the board is viewed by a technician who did not design it.
10. Check fiducials, tooling features and panelization before release
A single prototype can sometimes be assembled manually with minimal production tooling. A repeatable SMT process is different.
Depending on the assembly line and board geometry, the manufacturer may need:
- global fiducials;
- local fiducials for fine-pitch devices;
- tooling holes;
- panel rails;
- breakaway tabs;
- V-score or routing strategy;
- minimum edge clearance for conveyor handling.
Small, irregular or round boards often benefit from panelization even when only a modest quantity is required.
Ask the assembly partner early how the board will be held, transported, located and separated.
11. Keep copper and components away from board edges for the chosen depanelization method
Board-edge rules are not only about electrical clearance.
Routing tabs, mouse bites, V-scoring and mechanical cutting can apply stress to nearby copper and components. Components placed too close to a break line may crack solder joints or become difficult to assemble.
Review:
- copper-to-edge clearance;
- component-to-edge clearance;
- fragile MLCC placement near scored edges;
- connector overhang;
- antenna keep-out areas;
- mechanical cutouts and slots.
The required margin depends on how the panel will be fabricated and separated.
12. Perform one release review using the actual manufacturing package
A design can be correct inside the EDA project and still be released incorrectly.
Before manufacturing, review the exact files that will be sent to the supplier:
- fabrication Gerbers or ODB++/IPC-2581 package;
- NC drill data;
- board outline;
- stack-up and fabrication notes;
- BOM;
- pick-and-place/CPL file;
- assembly drawing;
- polarity notes;
- DNP/DNI list;
- test requirements;
- revision identifier.
Open the exported files in an independent viewer when possible. Confirm that the output represents the final design revision.
This catches a class of mistakes that schematic and PCB DRC cannot detect: release-package mistakes.
A practical pre-SMT DFM checklist
Before sending the design for assembly, confirm the following:
DRC is necessary, but it is not the same as DFM
Electrical and geometric rule checks are essential. They catch many errors automatically.
But DFM includes questions that software cannot always answer by itself:
- Will this footprint assemble reliably with the chosen stencil process?
- Can the nozzle access this component?
- Is the part orientation obvious to production staff?
- Is the board easy to test?
- Is a design feature forcing the factory into a special process without a strong reason?
That is why a useful DFM review combines automated checks with manufacturing experience.
Always compare this checklist with the selected assembler’s current capabilities. JLCPCB’s published DFM and DFA rules and BOM/CPL requirements are useful examples of the manufacturing-specific checks that should be confirmed before release.
Final thought
A PCB is not finished when routing is complete. It is finished when the design can be fabricated, assembled, inspected and tested repeatedly with acceptable yield and cost.
The most effective DFM improvements are often small: a larger via pad, a corrected footprint, clearer polarity marking, a better component gap, a clean BOM/CPL pair, or an agreed panel design. Small corrections made before release can prevent days of rework later.